1. Field of the Invention
The present invention relates to an interface between a host system and a pluggable data link, in particular, the invention relates to in interface protocol between the host system and an optical data link.
2. Related Background Arts
A Japanese Patent published as JP-2004-297682A has disclosed an optical module to provide an arrangement for the host system to access registers in the optical module. Specifically, a processor in the optical module stores data copied from the IEEE register, which is revised in accordance with the 10 Giga-bit attachment unit interface (XAUI), to a virtual register of the IEEE/XENPAK by a preset timing. The processor may output, in response to a request from the media access control layer (MAC), the data that is copied from the IEEE register and stored in the IEEE/XENPAK virtual register through the medium dependent input/output (MDIO) interface. Such an arrangement may realize a unified control of the registers and transmit data within the register promptly in response to a request from the MAC layer.
A Japanese Patent published as JP-2006-101163A has disclosed another optical module directed to solve a mismatching between data stored in the register due to errors, one of which has a type of the high-speed error and detected only by PHYIC, while, the other has another type of the low-speed error and detected only by the DCU. The optical module disclosed therein includes the PHY_LASI_Status register (Link Alarm Status Interrupt), the PHYIC, and the DCU. The PHYIC includes the PHY_LASI_Control register into which the flags to assert/negate the LASI is set depending on the cause of the errors. The DCU has a register that emulates the PHY_LASI_Control register, that is, an alarm control register for deciding to transmit the error externally depending on the type of the error. Generating an UNMASK signal, which may identify the type of the error independent of the cause thereof, and transmitting it to the DCU, the DCU may notify the error to the host system decided by the UNMASK signal and store the data in the PHY_LASI_Status register to the DCU_LASI_Status register.
When the optical module includes a plurality of devices communicating with protocols different from others, the devices may not be controlled by the processor only by managing the registers because destinations and formats are different depending on the communicating protocols. One scheme to solve the subject above has been considered where data to be transmitted are stored in registers in advance to the transmission and the processor defines the destination and converts the format of the data. However, this scheme needs a comparably large memory and restricts the number of devices by the size of the memory.